TURNKEY & SERVICES (BUSINESS MODEL)
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SOC / ASIC Design Turnkey Service
  Technology: 65nm, 90nm, 0.13um, 0.18um, 0.25um, 0.35um, 0.5um
SOC Implementation Platform Service:
  Spec-in, Project-in, RTL to CHIP, Netlist to CHIP, RTL QA, STA, Signal Integrity, LAYOUT, Low Power Design, DFT, ATPG, BSD, Mem_BIST, Power Analysis(RTL, Netlist, Package)
SiP Design Turnkey Service
Platform ASIC Design Turnkey Service
  ARM-based Platform;Gate Array Platform;Structured ASIC Platform
IP(Special I/O, Mixed Signal, High Density Memory...) Design Service:
  Special I/O, ADC & DAC, High Density Memory;Customized, Modify, Athoring
GATE ARRAY(Mask/Metal Type FPGA) Design Turnkey Service
FPGA To ASIC(ASIC To ASIC) Design Turnkey Sercivce
Structured ASIC IP(Platform ASIC) Design Turnkey Service
LAYOUT(APR, Full custom, Shrinking) Design Service
COT(GDSII TO CHIP) Turnkey Service
MPW (Multi-Project Wafer) Shuttle Bus Service
SOC / ASIC Product Turnkey Service(PGC + TSMC + ASE):
  Testing Program Development(Agilent 93000, HILEVEL, Credence Sapphire D-10), Logistic, WIP, Tape-out, Package, Testing, Yield Improvement, Corner Run, Failure Analysis, Reliability, Wafer Allocation