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Over 1000 successful SOC/ASIC design projects (1991 - 2011)

Process: TSMC 65nmG+ 1P9M+RDL

Chip size : 327 X 327 mil2

26M Gates, 1.2GHz

Low power solution, DFT, MBIST

IP : DDR3, LVDS, PCIe

Application : MFP